With the advance of electric equipment toward smaller size, lighter weight and higher performance, the semiconductor mounting technology has changed from the pin mating type to the surface mounting which now becomes the mainstream. One bare chip mounting technology is flip-chip (FC) mounting. The flip-chip mounting is a technique of providing an LSI chip on its circuit pattern-bearing surface with several to several thousands of electrodes, known as bumps, of about 10 to 100 microns high and joining the chip to electrodes on a substrate with a conductive paste or solder. Then the sealing material used for the protection of FC devices must penetrate into gaps of several tens of microns defined by bumps between the substrate and the LSI chip. Conventional liquid epoxy resin compositions used as the underfill material for flip-chip devices are generally composed of a liquid epoxy resin, a curing agent and an inorganic filler. Of these, the most predominant is a composition in which a large amount of inorganic filler is blended in order to provide a matching coefficient of linear expansion with those of semiconductor chips, substrates and bumps for increased reliability.
The flip-chip underfill materials with high loading of filler, however, suffer from very low productivity since they have a high viscosity due to the high filler loading so that they may penetrate into the gap between chip and substrate at a very slow rate. There is a desire to overcome this problem. Also recently, as semiconductor chips become large sized, more attention must be paid to the problem that not only chip cracks, but also fillet cracks occur during solder reflow, despite a matching of expansion coefficient among semiconductor chip, sealing material, organic substrate and solder bumps.